IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
(DFT 2017)
October 23–25, 2017
Cambridge, UK

http://www.dfts.org

Dear Colleagues,

The symposium is returning to Europe on its 30th anniversary and will take place in UK at the Moller Centre (Churchill College),   situated in the beautiful university city of Cambridge, UK, which is accessible from major international airports.  Below are some additional information for prospective attendees.

Follow us on Twitter: @DFTSymposium

DFT is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in digital systems inclusive of emerging technologies. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field.

All aspects of design, manufacturing, test, reliability, and availability that are affected by defects during manufacturing and by faults during system operation are of interest.

This year the symposium features four keynote presentations, 18 full papers (6 pages each), 18 short papers (4 pages each), and 6 special session presentations with authors hailing from 26 different countries. 

This year we have four keynote speeches lined up: two from industrial experts and two from academic experts, covering interesting directions in challenging new issues surfacing electronic test and design. 

Opening keynote: 

• Murphy goes 3D by Dr. Erik Jan Marinissen of IMEC

Second day keynotes: 

• Hardware-Assisted Security: Promises, Pitfalls and Opportunities by Prof. Ahmad-Reza Sadeghi of the TU Darmstadt
• Fault-Tolerant Microbiology-on-a-Chip: Defects, Testing, Fault Avoidance, and Error Recovery in Microfluidic Biochips by  Prof. Krishnendu Chakrabarty of Duke University

Third day keynote:

• Functional Safety and Security: the Challenges in Developing IP for These Marketsby Dr Peter Harrod from ARM

The final technical program will be available soon at http://www.dfts.org/program.htm

This year DFT will provide researchers with the opportunity to present demos of their research outcome and products (including software design automation tools, simulators, hardware prototypes, etc.), as a complementary presentation to the regular paper sessions and industrial demos. 

Submission deadline (Extended): September 9, 2017

For more information about demos see http://www.dfts.org/csd.htm

Early registration: September 9, 2017 Details about registration are available at http://www.dfts.org/registration.htm

The symposium venue (Møller Centre, Churchill College) is a fully featured conference venue with accommodation facilities. 

Apart from the venue, Cambridge offers plenty of options for local hotels and accommodations. 

However, as the symposium is in the term time, booking early is highly recommended.

Traveling and accommodation information are available at http://www.dfts.org/venue.htm

If you need an invitation letter for visa, please e-mail Rishad.Shafik@ncl.ac.uk  with your full name, nationality, passport or identification number(s) and work/affiliation details.

General co-chairs:

• Qiaoyan Yu (University of New Hampshire, USA - Qiaoyan.Yu@unh.edu)
• Rishad Shafik (Newcastle University, UK - Rishad.Shafik@newcastle.ac.uk)

Program co-chairs:

• Antonio Miele (Politecnico di Milano, IT - antonio.miele@polimi.it)
• Saqib Khursheed (Liverpool University, UK - S.Khursheed@liverpool.ac.uk)

Industrial liaison chair:

•  Prashant Joshi (Cadence, USA - joship@cadence.com)

Publicity chair:

• Mihalis Psarakis (University of Piraeus, GR - mpsarak@unipi.gr)
• Spyros Tragoudas (Southern Illinois University, USA - spyros@engr.siu.edu)

DFT 2017 is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).

TTTC CHAIR
Chen-Huan CHIANG
Intel - USA
E-mail chen-huan.chiang@intel.com

PAST CHAIR
Michael NICOLAIDIS
TIMA laboratory - France
E-mail michael.nicolaidis@imag.fr

TTTC 1ST VICE CHAIR
Matteo SONZA REORDA
Politecnico di Torino - Italy
E-mail matteo.sonzareorda@polito.it

SECRETARY
Joan FIGUERAS
Un. Politec. de Catalunya - Spain
E-mail figueras@eel.upc.es

TEST WEEK COORDINATOR
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

TUTORIALS AND EDUCATION
Paolo BERNARDI
Politecnico di Torino - Italy
E-mail paolo.bernardi@polito.it

STANDARDS
Rohit KAPUR
Synopsys, Inc. - USA
E-mail rkapur@synopsys.com

EUROPE
Giorgio DI NATALE
LIRMM - France
E-mail giorgio.dinatale@lirmm.fr

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Giorgio DI NATALE
LIRMM - France
E-mail giorgio.dinatale@lirmm.fr

PRESIDENT OF BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

SENIOR PAST CHAIR
Adith SINGH
Auburn University – USA
E-mail adsingh@eng.auburn.edu

TTTC 2ND VICE CHAIR
Rohit KAPUR
Synopsys, Inc. – USA
E-mail rkapur@synopsys.com

FINANCE
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chen-huan.chiang@alcatel-lucent.com

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES
Matteo SONZA REORDA
Politecnico di Torino - Italy
E-mail matteo.sonzareorda@polito.it

ASIA & PACIFIC
Kazumi HATAYAMA
NAIST - Japan
E-mail k-hatayama@is.naist.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
E-mail champac@inaoep.mx

NORTH AMERICA
André IVANOV
University of British Columbia - Canada
E-mail ivanov@ece.ubc.ca

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com